low cost 12-bit cmos four-quadrant multiplying digital-to-analog converter features l full four-quadrant multiplication l 12-bit end-point linearity l differential linearity 1/2lsb max over temperature l monotonicity guaranteed over temperature l ttl-/cmos-compatible l single +5v to +15v supply l latch-up resistant l 7521/7541/7541a replacement l packages: plastic dip, plastic soic l low cost description the burr-brown dac7541a is a low cost 12-bit, four-quadrant multiplying digital-to-analog converter. laser-trimmed thin-film resistors on a monolithic cmos circuit provide true 12-bit integral and differ- ential linearity over the full specified temperature range. dac7541a is a direct, improved pin-for-pin replace- ment for 7521, 7541, and 7541a industry standard parts. in addition to a standard 18-pin plastic package, the dac7541a is also available in a surface-mount plastic 18-pin soic. 10k w 10k w 20k w 20k w 10k w 20k w 10k w 20k w 10k w 20k w i out 2 bit 11 bit 3 bit 2 bit 1
(msb) v ref bit 12
(lsb) 20k w i out 1 r fb spdt nmos
switches digital inputs (dtl-/ttl-/cmos-compatible)
logic: a switch is closed to i out 1 for its digital input in a ?igh?state. switches shown for digital inputs ?igh? dac7541a international airport industrial park ? mailing address: po box 11400 ? tucson, az 85734 ? street address: 6730 s. tucson blvd. ? tucson, az 85706 tel: (520) 746-1111 ? twx: 910-952-1111 ? cable: bbrcorp ? telex: 066-6491 ? fax: (520) 889-1510 ? immediate product info: (800) 548-6132 ? 1987 burr-brown corporation pds-639c printed in u.s.a. september, 1993 sbas147
2 dac7541a parameter grade t a = +25 c t a = t max , t min (1) units test conditions/comments propagation delay (from digital input change to 90% of out 1 load = 100 w , c ext = 13pf. final analog output) all 100 ns typ digital inputs = 0v to v dd or v dd to 0v. digital-to-analog glitch v ref = 0v, all digital inputs 0v to v dd or v dd to impulse all 1000 nv-s typ 0v. measured using opa606 as output amplifier. multiplying feedthrough error (v ref to out 1 ) all 1.0 mvp-p max v ref = 10v, 10khz sine wave. output current settling time all 0.6 m s typ to 0.01% of full scale range. out 1 load = 100 w , c ext = 13pf. all 1.0 m s max digital inputs: 0v to v dd or v dd to 0v. output capacitance c out 1 (pin 1) all 100 100 pf max digital inputs = v ih c out 2 (pin 2) all 60 60 pf max digital inputs = v ih c out 1 (pin 1) all 70 70 pf max digital inputs = v il c out 2 (pin 2) all 100 100 pf max digital inputs = v il parameter grade t a = +25 c t a = t max , t min (1) units test conditions/comments accuracy resolution all 12 12 bits relative accuracy j 1 1 lsb max 1lsb = 0.024% of fsr. k 1/2 1/2 lsb max 1/2lsb = 0.012% of fsr. differential non-linearity j 1 1 lsb max all grades guaranteed monotonic to 12 bits, k 1/2 1/2 lsb max t min to t max . gain error j 6 8 lsb max measured using internal r fb and includes effect k 1 3 lsb max of leakage current and gain t.c. gain error can be trimmed to zero. gain temperature coefficient (d gain/ d temperature) all 5 ppm/ c max typical value is 2ppm/ c. output leakage current: out 1 (pin 1) j, k 5 10 na max all digital inputs = 0v. out 2 (pin 2) j, k 5 10 na max all digital inputs = v dd . reference input voltage (pin 17 to gnd) all C10/+10 C10/+10 v min/max input resistance (pin 17 to gnd) all 7-18 7-18 k w min/max typical input resistance = 11k w . typical input resistance temperature coefficient is C50ppm/ c. digital inputs v in (input high voltage) all 2.4 2.4 v min v il (input low voltage) all 0.8 0.8 v max i in (input current) all 1 1 m a max logic inputs are mos gates. i in typ (25 c) = 1na c in (input capacitance) (2) all 8 8 pf max v in = 0v power supply rejection d gain/ d v dd all 0.01 0.02 % per % max v dd = +11.4v to +16v power supply v dd range all +5 to +16 +5 to +16 v min to accuracy is not guaranteed over this range. v max i dd all 2 2 ma max all digital inputs v il or v in . all 100 500 m a max all digital inputs 0v or v dd . specifications electrical at +25 c, +v dd = +12v or +15v, v ref = +10v, v pin 1 = v pin 2 = 0v, unless otherwise specified. notes: (1) temperature ranges are: = 0 c to + 70 c for jp, kp, ju and ku versions. (2) guaranteed by design but not production tested. dac7541a ac performance characteristics these characteristics are included for design guidance only and are not production tested. v dd = +15v, v ref = +10v except where stated, v pin 1 = v pin 2 = 0v, output amp is opa606 except where stated. dac7541a note: (1) temperature ranges are: = 0 c to + 70 c for jp, kp, ju and ku versions.
3 dac7541a temperature relative model package range accuracy (lsb) gain error (lsb) dac7541ajp plastic dip 0 c to +70 c 1 6 dac7541akp plastic dip 0 c to +70 c 1/2 1 dac7541aju plastic soic 0 c to +70 c 1 6 dac7541aku plastic soic 0 c to +70 c 1/2 1 burn-in screening option see text for details. absolute maximum ratings (1) pin connections v dd (pin 16) to ground ...................................................................... +17v v ref (pin 17) to ground ..................................................................... +25v v rpb (pin 18) to ground ..................................................................... 25v digital input voltage (pins 4-15) to ground ............................... C0.4v, v dd v pin 1 , v pin 2 to ground ............................................................. C0.4v, v dd power dissipation (any package): to +75 c ..................................................................................... 450mw derates above +75 c .............................................................. C6mw/ c lead temperature (soldering, 10s) ................................................ +300 c storage temperature: plastic package ......................................... +125 c note: (1) stresses above those listed above may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other condition above those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. the information provided herein is believed to be reliable; however, burr-brown assumes no responsibility for inaccuracies or omissions. burr-brown assumes no responsibility for the use of this information, and all use of such information shall be entirely at the users own risk. prices and specifications are subject to change without notice. no patent rights or licenses to any of the circuits described herein are implied or granted to any third party. burr-brown does not authorize or warrant any burr-brown product for use in life support devices and/or systems. top view dip/soic electrostatic discharge sensitivity the dac7541a is an esd (electrostatic discharge) sensi- tive device. the digital control inputs have a special fet structure, which turns on when the input exceeds the supply by 18v, to minimize esd damage. however, permanent damage may occur on unconnected devices subject to high energy electrostatic fields. when not in use, devices must be stored in conductive foam or shunts. the protective foam should be discharged to the destination socket before devices are removed. burn-in screening burn-in screening is an option available for the models in the ordering information table. burn-in duration is 160 hours at the indicated temperature (or equivalent combination of time and temperature). all units are tested after burn-in to ensure that grade speci- fications are met. to order burn-in, add -bi to the base model number. package information package drawing model package number (1) dac7541jp plastic dip 218 dac7541kp plastic dip 218 dac7541ju plastic soic 219 dac7541ku plastic soic 219 dac7541jp-bi plastic dip 218 dac7541kp-bi plastic dip 218 note: (1) for detailed drawing and dimension table, please see end of data sheet, or appendix d of burr-brown ic data book. dac7541a 1
2
3
4
5
6
7
8
9 18
17
16
15
14
13
12
11
10 i out 1
i out 2
gnd
bit 1 (msb)
bit 2
bit 3
bit 4
bit 5
bit 6 r fb
v ref
+v dd
bit 12 (lsb)
bit 11
bit 10
bit 9
bit 8
bit 7 temperature relative burn-in temp. model package range accuracy (lsb) (160 hours) (1) dac7541ajp-bi plastic dip 0 c to +70 c 1 +85 c dac7541akp-bi plastic dip 0 c to +70 c 1/2 +85 c ordering information
4 dac7541a typical performance curves t a = +25 c, v dd = +15v, unless otherwise noted. mechanical information mils (0.001") millimeters die size 104 x 105 5 2.64 x 2.67 0.13 die thickness 20 3 0.51 0.08 min. pad size 4 x 4 0.10 x 0.10 metalization aluminum pad function 1i out1 2i out2 3 gnd 4 bit 1 (msb) 5 bit 2 6 bit 3 7 bit 4 8 bit 5 9 bit 6 pad function 10 bit 7 11 bit 8 12 bit 9 13 bit 10 14 bit 11 15 bit 12 (lsb) 16 +v dd 17 v ref 18 r feedback substrate bias: isolated. nc: no connection. die topology dac7541a 0 gain error vs supply voltage gain error (lsb) 015 3
5/2
2
3/2
1
1/2 supply voltage (v) 510 0.001 frequency (hz) feedthrough error vs frequency feedthrough (% fsr) 1m 1k 10k 100 100k 10
1
0.10
0.010 0 linearity vs supply voltage linearity error (lsb) 015 3/2
5/4
1
3/4
1/2
1/4 supply voltage (v) 510 0 supply current vs supply voltage supply current (?) 015 3/2
5/4
1
3/4
1/2
1/4 supply voltage (v) 510 v ih = +2.4v v ih = v dd
5 dac7541a discussion of specifications relative accuracy this term (also known as linearity) describes the transfer function of analog output to digital input code. the linearity error describes the deviation from a straight line between zero and full scale. differential nonlinearity differential nonlinearity is the deviation from an ideal 1lsb change in the output, from one adjacent output state to the next. a differential nonlinearity specification of 1.0lsb guarantees monotonicity. gain error gain error is the difference in measure of full-scale output versus the ideal dac output. the ideal output for the dac7541a is C(4095/4096) x (v ref ). gain error may be adjusted to zero using external trims. output leakage current the measure of current which appears at out 1 with the dac loaded with all zeros, or at out 2 with the dac loaded with all ones. multiplying feedthrough error this is the ac error output due to capacitive feedthrough from v ref to out 1 with the dac loaded with all zeros. this test is performed at 10khz. output current settling time this is the time required for the output to settle to a tolerance of 0.5lsb of final value from a change in code of all zeros to all ones, or all ones to all zeros. propagation delay this is the measure of the delay of the internal circuitry and is measured as the time from a digital code change to the point at which the output reaches 90% of final value. digital-to-analog glitch impulse this is the measure of the area of the glitch energy measured in nv-seconds. key contributions to glitch energy are digital word-bit timing differences, internal circuitry timing differ- ences, and charge injected from digital logic. monotonicity monotonicity assures that the analog output will increase or stay the same for increasing digital input codes. the dac7541a is guaranteed monotonic to 12 bits. power supply rejection power supply rejection is the measure of the sensitivity of the output (full scale) to a change in the power supply voltage. figure 1. simplified dac circuit. equivalent circuit analysis figures 2 and 3 show the equivalent circuits for all digital inputs low and high, respectively. the reference current is switched to i out 2 when all inputs are low and i out 1 when inputs are high. the i l current source is the combination of surface and junction leakages to the substrate; the 1/4096 current source represents the constant one-bit current drain through the ladder terminal. dynamic performance output impedance the output resistance, as in the case of the output capaci- tance, is also modulated by the digital input code. the resistance looking back into the i out 1 terminal may be anywhere between 10k w (the feedback resistor alone when all digital inputs are low) and 7.5k w (the feedback resistor in parallel with approximately 30k w of the r-2r ladder network resistance when any single bit logic is high). the static accuracy and dynamic performance will be affected by this modulation. the gain and phase stability of the output circuit description the dac7541a is a 12-bit multiplying d/a converter consisting of a highly stable thin-film r-2r ladder network and 12 pairs of current steering switches on a monolithic chip. most applications require the addition of a voltage or current reference and an output operational amplifier. a simplified circuit of the dac7541a is shown in figure 1. the r-2r inverted ladder binarily divides the input currents that are switched between i out 1 and i out 2 bus lines. this switching allows a constant current to be maintained in each ladder leg independent of the input code. the input resistance at v ref (figure 1) is always equal to r ldr (r ldr is the r/2r ladder characteristic resistance and is equal to value r). since r in at the v ref pin is constant, the reference terminal can be driven by a reference voltage or a reference current, ac or dc, of positive or negative polarity. bit 12
(lsb) 10k w 10k w 20k w 20k w 10k w 20k w 20k w i out 2 bit 3 bit 2 bit 1
(msb) v ref 20k w i out 1 r fb digital inputs (dtl-/ttl-/cmos-compatible)
switches shown for digital inputs ?igh? s 2 s 1 s 3 s 12
6 dac7541a figure 2. dac7541a equivalent circuit (all inputs low). figure 3. dac7541a equivalent circuit (all inputs high). 1/4096 i l 90pf i l 60pf r = 10k w r fb i out 1 i out 2 i ref v ref r ? 10k w 1/4096 i l 90pf i l 55pf r = 10k w r fb i out 2 i out 1 r ? 10k w i ref v ref amplifier, board layout, and power supply decoupling will all affect the dynamic performance of the dac7541a. the use of a compensation capacitor may be required when high- speed operational amplifiers are used. it may be connected across the amplifiers feedback resistor to provide the nec- essary phase compensation to critically dampen the output. see figures 4 and 6. applications op amp considerations the input bias current of the op amp flows through the feedback resistor, creating an error voltage at the output of the op amp. this will show up as an offset through all codes of the transfer characteristics. a low bias current op amp such as the opa606 is recommended. low offset voltage and v os drift are also important. the output impedance of the dac is modulated with the digital code. this impedance change (approximately 10k w to 30k w ) is a change in closed-loop gain to the op amp. the result is that v os will be multiplied by a factor of one to two depending on the code. this shows up as a linearity error. offset can be adjusted out using figure 4. gain may be adjusted using figure 5. unipolar binary operation (two-quadrant multiplication) figure 4 shows the analog circuit connections required for unipolar binary (two-quadrant multiplication) operation. with a dc reference voltage or current (positive or negative polarity) applied at pin 17, the circuit is a unipolar d/a converter. with an ac reference voltage or current, the circuit provides two-quadrant multiplication (digitally con- trolled attenuation). the input/output relationship is shown in table i. binary input analog output msb lsb 1111 1111 1111 Cv ref (4095/4096) 1000 0000 0000 Cv ref (2048/4096) 0000 0000 0001 Cv ref (1/4096) 0000 0000 0000 0v table i. unipolar codes. c 1 phase compensation (10 to 25pf) in figure 4 may be required for stability when using high speed amplifiers. c 1 is used to cancel the pole formed by the dac internal feedback resistance and output capacitance at out 1 . r 1 in figure 5 provides full scale trim capabilityload the dac register to 1111 1111 1111, adjust r 1 for v out = C v ref (4095/4096). alternatively, full scale can be adjusted by omitting r 1 and r 2 and trimming the reference voltage magnitude. bipolar four-quadrant operation figure 6 shows the connections for bipolar four-quadrant operation. offset can be adjusted with the a 1 to a 2 summing resistor, with the input code set to 1000 0000 0000. gain may be adjusted by varying the feedback resistor of a 2 . the input/output relationship is shown in table ii. binary input analog output msb lsb 1111 1111 1111 +v ref (2047/2048) 1000 0000 0000 0v 0111 1111 1111 Cv ref (1/2048) 0000 0000 0000 Cv ref (2048/2048) table ii. bipolar codes.
7 dac7541a figure 4. basic connection with op amp v os adjust: unipolar (two-quadrant) multiplying configuration. figure 5. basic connection with gain adjust (allows adjustment up or down). figure 6. bipolar four-quadrant multiplier. 16 r f dac7541a out 1 c 1 b 1 v ref v out 2 1 4 5 6 7 8 9 10 11 12 13 14 b 12 15 3 18 opa604 17 +15v out 2 10k w +v cc v out = ? ref + + + ???+ b 1 2 ( b 2 4 b 3 8 b 12 4096 ) ?0v v ref +10v 4095 4096 0 v out ? v ref where: b n = 1 if the b n digital input is high.
b n = 0 if the b n digital input is low. msb single-point ground 16 dac7541a b 1 v ref 2 1 4 5 6 7 8 9 10 11 12 13 14 b 12 15 3 18 opa604 17 +15v 10k w +v cc msb r 1
200 w r 2
200k w opa604
or
1/2 opa2604 v ref 47 w dac7541a bits 1-12 c 1
33pf +v dd 4...15 v out 10k w 20k w 20k w 2 1 16 18 17 opa604
or
1/2 opa2604 3 5k w v out = +v ref + + + ???+ ?1 b 1 1 ( b 2 2 b 3 4 b 12 2048 ) a 1 a 2
8 dac7541a digitally controlled gain block the dac7541a may be used in a digitally controlled gain block as shown in figure 7. this circuit gives a range of gain from one (all bits = one) to 4096 (lsb = one). the transfer function is: all bits off is an illegal state, as division by zero is impos- sible (no op amp feedback). also, errors increase as gain increases, and errors are minimized at major carries (only one bit on at a time). v out = + + + ? ? ? + b 1 2 b 3 8 b 2 4 b 12 4096 Cv in ( ) figure 7. digitally programmable gain block. bits 1 to 12 v out opa604 dac7541a 23 1 18 17 16 v dd v in
packaging information orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish msl peak temp (3) dac7541ajp active pdip n 18 20 green (rohs & no sb/br) cu nipdau n / a for pkg type dac7541ajpg4 active pdip n 18 20 green (rohs & no sb/br) cu nipdau n / a for pkg type dac7541aju active sop dtc 18 43 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr dac7541ajug4 active sop dtc 18 43 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr dac7541akp active pdip n 18 20 green (rohs & no sb/br) cu nipdau n / a for pkg type dac7541akpg4 active pdip n 18 20 green (rohs & no sb/br) cu nipdau n / a for pkg type dac7541aku active sop dtc 18 43 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr dac7541aku/1k active sop dtc 18 1000 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr dac7541aku/1kg4 active sop dtc 18 1000 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr DAC7541AKUG4 active sop dtc 18 43 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr (1) the marketing status values are defined as follows: active: product device recommended for new designs. lifebuy: ti has announced that the device will be discontinued, and a lifetime-buy period is in effect. nrnd: not recommended for new designs. device is in production to support existing customers, but ti does not recommend using this part in a new design. preview: device has been announced but is not in production. samples may or may not be available. obsolete: ti has discontinued the production of the device. (2) eco plan - the planned eco-friendly classification: pb-free (rohs), pb-free (rohs exempt), or green (rohs & no sb/br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. tbd: the pb-free/green conversion plan has not been defined. pb-free (rohs): ti's terms "lead-free" or "pb-free" mean semiconductor products that are compatible with the current rohs requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. where designed to be soldered at high temperatures, ti pb-free products are suitable for use in specified lead-free processes. pb-free (rohs exempt): this component has a rohs exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. the component is otherwise considered pb-free (rohs compatible) as defined above. green (rohs & no sb/br): ti defines "green" to mean pb-free (rohs compatible), and free of bromine (br) and antimony (sb) based flame retardants (br or sb do not exceed 0.1% by weight in homogeneous material) (3) msl, peak temp. -- the moisture sensitivity level rating according to the jedec industry standard classifications, and peak solder temperature. important information and disclaimer: the information provided on this page represents ti's knowledge and belief as of the date that it is provided. ti bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. efforts are underway to better integrate information from third parties. ti has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ti and ti suppliers consider certain information to be proprietary, and thus cas numbers and other limited information may not be available for release. in no event shall ti's liability arising out of such information exceed the total purchase price of the ti part(s) at issue in this document sold by ti to customer on an annual basis. package option addendum www.ti.com 8-jan-2007 addendum-page 1
important notice texas instruments incorporated and its subsidiaries (ti) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. cu stomers should obtain the latest relevant information before placing orders and should verify that such info rmation is current and complete. all products are sold subject to ti?s terms and conditions of sale supplied at the time of order acknowledgment. ti warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with ti?s standard warranty. testing and othe r quality control techniques are used to the extent ti deems necessary to support this warranty. except where mandated by governm ent requirements, testing of all parameters of each product is not necessarily performed. ti assumes no liability for applications assistance or customer product design. customers are responsible for their products and applications using ti component s. to minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. ti does not warrant or represent that any license, either express or implie d, is granted under any ti patent right, copyright, mask work right, or other ti intellectual property right relating to any combination, machine, or process in which ti products or services are us ed. information published by ti regarding third-party products or services does not consti tute a license from ti to use such products or services or a warranty or endorsement thereof. use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from ti under the pat ents or other intellectual property of ti. reproduction of information in ti data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, lim itations, and notices. reproduction of this information with alteration is an unfair and deceptive business practice. ti is not responsible or liable for such altered documentation. resale of ti products or services with statements diffe rent from or beyond the parameters stated by ti for that product or service voids all express and any imp lied warranties for the associated ti product or service and is an unfair and deceptive business practice. ti is not responsible or liable for any such statements. following are urls where you can obtain information on other texas instruments products and application solutions: products applications amplifiers amplifier.ti.c om audio www.ti.com/audio data converters dataconverter.ti.co m automotive www.ti.com/automotive dsp dsp.ti.com broadband www.ti.com/broadband interface interface.ti.com digital control www.ti.com/digitalcontrol logic logic.ti.com military www.ti.com/military power mgmt power.ti.com optical networking www.ti.com/opticalnetwork microcontrollers microcontroller.ti.com security www.ti.com/security low power wireless www.ti.com/lpw telephony www.ti.com/telephony video & imaging www.ti.com/video wireless www.ti.com/wireless mailing address: texas instruments post office box 6553 03 dallas, texas 75265 copyright ? 2007, texas instruments incorporated
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